CPC H03K 3/356113 (2013.01) [G06F 30/30 (2020.01); H01L 27/0207 (2013.01); H03K 19/0175 (2013.01)] | 20 Claims |
1. A voltage level shifter cell configured to convert voltage levels of input signals of multi-bits, the voltage level shifter cell comprising:
a first circuit area including a first voltage level shifter configured to convert a 1-bit first input signal from among the input signals; and
a second circuit area including a second voltage level shifter configured to convert a 1-bit second input signal from among the input signals,
wherein the first circuit area and the second circuit area share a first N-well to which a first power voltage is applied, and the first circuit area and the second circuit area share a second N-well to which a second power voltage is applied,
wherein the first N-well is formed to extend in a first direction, and the first N-well and the second N-well are arranged to overlap in a second direction crossing the first direction.
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