CPC H03K 3/017 (2013.01) | 20 Claims |
1. An apparatus for in-phase and quadrature phase (“IQ”) generation, comprising:
a CMOS clock distributor for providing a clock input;
a first IQ divider circuit configured for receiving the clock input and dividing the clock input into in-phase and quadrature phase (IQ) output;
a clock processing circuit for processing the clock input into a processed clock input;
a second IQ divider circuit for receiving the processed clock input and dividing the processed clock input into in-phase and quadrature phase (IQ) output, wherein the processed clock input is received by the second IQ divider circuit and not received by the first IQ divider circuit; and
a multiplexer circuit coupled to the first IQ divider circuit and the second IQ divider circuit for selecting the IQ output from the first IQ divider circuit or the second IQ divider circuit.
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