US 11,728,771 B2
Circuit apparatus and oscillator
Kohei Beppu, Minowa (JP); and Takehiro Yamamoto, Matsumoto (JP)
Assigned to SEIKO EPSON CORPORATION
Filed by Seiko Epson Corporation, Tokyo (JP)
Filed on Apr. 29, 2022, as Appl. No. 17/732,902.
Claims priority of application No. 2021-077277 (JP), filed on Apr. 30, 2021.
Prior Publication US 2022/0352850 A1, Nov. 3, 2022
Int. Cl. H03B 5/32 (2006.01); H03K 3/03 (2006.01); G06F 1/04 (2006.01); H03B 5/36 (2006.01)
CPC H03B 5/323 (2013.01) [G06F 1/04 (2013.01); H03B 5/364 (2013.01); H03K 3/03 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A circuit apparatus comprising:
an oscillation circuit that generates an oscillation signal;
a first buffer circuit that outputs a first clock signal based on the oscillation signal;
a second buffer circuit that outputs a second clock signal based on the first clock signal;
a first terminal electrically couplable to a first node via which the first buffer circuit outputs the first clock signal;
a second terminal electrically coupled to a second node via which the second buffer circuit outputs the second clock signal; and
a switch circuit that electrically couples or decouples the first node to or from the first terminal; and
a resistive element electrically coupled to and disposed between the first node and the switch circuit,
wherein a rise period of the first clock signal is shorter than a rise period of the second clock signal.