US 11,728,642 B2
Semiconductor device and protection circuit
Shigefumi Ishiguro, Yokohama Kanagawa (JP); Yasuhiro Suematsu, Yokohama Kanagawa (JP); Takeshi Miyaba, Yokohama Kanagawa (JP); Kimimasa Imai, Kawasaki Kanagawa (JP); and Maya Inagaki, Yokohama Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Sep. 14, 2021, as Appl. No. 17/474,941.
Claims priority of application No. 2021-035519 (JP), filed on Mar. 5, 2021.
Prior Publication US 2022/0285934 A1, Sep. 8, 2022
Int. Cl. H02H 9/04 (2006.01); H03H 7/01 (2006.01); H03K 19/20 (2006.01)
CPC H02H 9/046 (2013.01) [H03H 7/0115 (2013.01); H03K 19/20 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a protection circuit electrically connected to a first line to be supplied with a first voltage and a second line to be supplied with a second voltage; and
a protection target circuit electrically connected to the first line and the second line downstream of the protection circuit, and to be protected by the protection circuit,
the protection circuit comprising:
first and second transistors including gates electrically connected to a first node, and connected in series to each other between the first and second lines;
third and fourth transistors including gates electrically connected to a second node between the first and second transistors, and connected in series to each other between the first and second lines;
a fifth transistor including a gate electrically connected to a third node between the third and fourth transistors, and provided between the second node and the second line;
an arithmetic circuit configured to receive a first signal from the second node or a fourth node located downstream of the second node, and output a second signal obtained by calculation using the first signal; and
a sixth transistor electrically connected to a fifth node located downstream of the second node, and configured to receive the second signal from the arithmetic circuit and output a control signal to the arithmetic circuit.