US 11,728,430 B2
Semiconductor devices including a stress pattern
Sung Min Kim, Incheon (KR); Hyo Jin Kim, Seoul (KR); and Dae Won Ha, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 4, 2021, as Appl. No. 17/518,741.
Application 17/518,741 is a continuation of application No. 16/402,292, filed on May 3, 2019, granted, now 11,195,952.
Claims priority of application No. 10-2018-0108380 (KR), filed on Sep. 11, 2018.
Prior Publication US 2022/0069128 A1, Mar. 3, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 21/762 (2006.01)
CPC H01L 29/7849 (2013.01) [H01L 21/76224 (2013.01); H01L 29/785 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprises:
a substrate;
a fin structure on the substrate;
a field insulation layer on a sidewall portion of the fin structure; and
a gate electrode on the fin structure, the gate electrode intersecting the fin structure,
wherein the fin structure includes a first semiconductor pattern, a stress pattern, and a second semiconductor pattern that are sequentially stacked on the substrate,
wherein the stress pattern comprises an oxide including germanium, and
wherein a first angle between an upper surface of the first semiconductor pattern and a first line parallel to an upper surface of the substrate is different from a second angle between a lower surface of the second semiconductor pattern and a second line parallel to the upper surface of the substrate.