US 11,728,429 B2
Method of fabricating semiconductor device
Yul Lee, Seoul (KR); and Yuri Masuoka, Seongnam-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Dec. 14, 2021, as Appl. No. 17/549,985.
Application 17/549,985 is a continuation of application No. 16/019,811, filed on Jun. 27, 2018, granted, now 11,222,978.
Claims priority of application No. 10-2018-0026923 (KR), filed on Mar. 7, 2018.
Prior Publication US 2022/0102555 A1, Mar. 31, 2022
Int. Cl. H01L 21/28 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 29/08 (2006.01)
CPC H01L 29/7848 (2013.01) [H01L 21/28167 (2013.01); H01L 21/76264 (2013.01); H01L 29/0895 (2013.01); H01L 29/66621 (2013.01); H01L 29/66628 (2013.01); H01L 29/66636 (2013.01); H01L 29/66651 (2013.01); H01L 29/785 (2013.01); H01L 29/7833 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming at least one active pattern on a substrate;
forming at least one gate electrode intersecting the at least one active pattern;
forming recesses in the at least one active pattern, the recesses being on opposite sides of the at least one gate electrode;
conformally forming a barrier layer in at least one of the recesses, such that the barrier layer includes oxygen and has a thickness of about 2 angstroms to about 5 angstroms; and
forming source/drain regions through the barrier layer by epitaxially growing the source/drain regions using the at least one active pattern as a seed layer.