US 11,728,388 B2
Method for manufacturing a semiconductor device
Keunhwi Cho, Seoul (KR); Byounghak Hong, Seoul (KR); and Myunggil Kang, Suwon-Si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Mar. 15, 2022, as Appl. No. 17/694,994.
Application 17/694,994 is a continuation of application No. 15/931,964, filed on May 14, 2020, granted, now 11,282,928.
Claims priority of application No. 10-2019-0140410 (KR), filed on Nov. 5, 2019.
Prior Publication US 2022/0208970 A1, Jun. 30, 2022
Int. Cl. H01L 29/161 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/161 (2013.01) [H01L 29/1041 (2013.01); H01L 29/7848 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor device, the method comprising:
alternately and repeatedly stacking a silicon germanium layer and a silicon layer on a substrate in a vertical direction perpendicular to a surface of the substrate to form a stacked structure;
forming silicon-rich silicon germanium layers from the silicon germanium layer by ion implanting silicon on the stacked structure;
patterning the stacked structure to form a preliminary active structure extending in a first direction parallel to the surface of the substrate;
patterning the preliminary active structure to form an active structure including silicon germanium patterns and silicon patterns that are alternately and repeatedly stacked in the vertical direction;
forming a semiconductor layer formed on both sidewalls of the active structure and serving as a source/drain region; and,
forming a gate structure on a surface of the active structure and on the substrate, the gate structure extending in a second direction parallel to the substrate surface and perpendicular to the first direction.