US 11,728,331 B2
Dielectric lattice with passive component circuits
Gary Horst Loechelt, Tempe, AZ (US); and Marco Fuhrmann, Gilbert, AZ (US)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Jan. 22, 2021, as Appl. No. 17/248,390.
Prior Publication US 2022/0238512 A1, Jul. 28, 2022
Int. Cl. H01L 27/06 (2006.01); H01L 49/02 (2006.01)
CPC H01L 27/0629 (2013.01) [H01L 28/20 (2013.01); H01L 28/40 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor region;
an active region disposed in the semiconductor region;
a termination region disposed on the semiconductor region and adjacent to the active region; and
a resistor disposed in the termination region, the resistor including:
a trench;
a conductive material disposed in the trench;
a first cavity separating the trench from the semiconductor region, a portion of the first cavity being disposed between a bottom of the trench and the semiconductor region; and
a second cavity separating the trench from the semiconductor region.