US 11,728,207 B2
Method for fabricating a strained semiconductor-on-insulator substrate
Walter Schwarzenbach, Saint Nazaire les Eymes (FR); Guillaume Chabanne, Le Touvet (FR); and Nicolas Daval, Goncelin (FR)
Assigned to Soitec, Bernin (FR)
Filed by Soitec, Bernin (FR)
Filed on Mar. 19, 2021, as Appl. No. 17/207,202.
Application 17/207,202 is a continuation of application No. 16/301,276, granted, now 10,957,577, previously published as PCT/EP2017/061793, filed on May 17, 2017.
Claims priority of application No. 1654369 (FR), filed on May 17, 2016.
Prior Publication US 2021/0225695 A1, Jul. 22, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/00 (2006.01); H01L 21/762 (2006.01)
CPC H01L 21/76275 (2013.01) [H01L 21/76254 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for fabricating a strained semiconductor-on-insulator substrate, the method comprising:
epitaxially growing an intermediate layer on a carrier substrate, and epitaxially growing a monocrystalline semiconductor layer on the intermediate layer, the carrier substrate, the intermediate layer, and the carrier substrate forming at least a portion of a donor substrate;
providing a receiving substrate comprising a strained monocrystalline semiconductor material on a base substrate;
bonding the donor substrate and the receiving substrate together to form a bonded structure;
selectively etching the carrier substrate with respect to the intermediate layer to remove the carrier substrate from the bonded structure;
selectively etching the intermediate layer with respect to the monocrystalline semiconductor layer to remove the intermediate layer from the bonded structure and expose a surface of the monocrystalline semiconductor layer, the exposed surface having a surface roughness of 3 Å RMS or less as measured by atomic force microscopy over a scan of 30×30 μm2; and
imparting strain on the monocrystalline semiconductor layer using the strained monocrystalline semiconductor material.