US 11,726,938 B2
Communications for field programmable gate array device
Peng Cheng, Redmond, WA (US); Ran Shu, Redmond, WA (US); Guo Chen, Redmond, WA (US); Yongqiang Xiong, Redmond, WA (US); Jiansong Zhang, Redmond, WA (US); Ningyi Xu, Redmond, WA (US); and Thomas Moscibroda, Redmond, WA (US)
Assigned to Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed by MICROSOFT TECHNOLOGY LICENSING, LLC, Redmond, WA (US)
Filed on Dec. 23, 2021, as Appl. No. 17/560,524.
Application 17/560,524 is a continuation of application No. 16/615,053, granted, now 11,243,901, previously published as PCT/US2018/028981, filed on Apr. 24, 2018.
Claims priority of application No. 201710375581.0 (CN), filed on May 24, 2017.
Prior Publication US 2022/0206979 A1, Jun. 30, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 13/38 (2006.01); G06F 13/12 (2006.01); G06F 21/76 (2013.01); H04L 65/1069 (2022.01); H04L 69/12 (2022.01)
CPC G06F 13/382 (2013.01) [G06F 13/126 (2013.01); G06F 21/76 (2013.01); H04L 65/1069 (2013.01); H04L 69/12 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A field programmable gate array (FPGA) device, comprising:
an application module;
a protocol stack module operable to:
access a plurality of target devices based on different communication protocols via a physical interface of the FPGA device; and
a universal access module operable to:
receive, from a first target device of the plurality of target devices, first data and a first identity of the application module, the application module acting as a destination of the first data, and
transmit the first data to the protocol stack module based on the first identity and predetermined routing information, the protocol stack module being accessible to the first target device via the physical interface.