US 11,726,928 B2
Network interface device with bus segment width matching
Steven Leslie Pope, Cambridge (GB); Derek Edward Roberts, Cambridge (GB); Dmitri Kitariev, Newport Beach, CA (US); Neil Duncan Turton, Cambridge (GB); David James Riddoch, Cambridgeshire (GB); and Ripduman Sohan, Washington, DC (US)
Assigned to XILINX, INC., San Jose, CA (US)
Filed by XILINX, INC., San Jose, CA (US)
Filed on Jun. 24, 2021, as Appl. No. 17/357,083.
Prior Publication US 2022/0414028 A1, Dec. 29, 2022
Int. Cl. G06F 13/16 (2006.01); G06F 13/28 (2006.01); G11C 7/10 (2006.01)
CPC G06F 13/1621 (2013.01) [G06F 13/1642 (2013.01); G06F 13/1678 (2013.01); G06F 13/287 (2013.01); G11C 7/1069 (2013.01); G11C 7/1096 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A network interface device, the network interface device comprising:
a data source;
a data sink; and
an interconnect configured to receive data from the data source and to output data to the data sink, the interconnect comprising:
a memory having memory cells, each memory cell having a width which matches a bus segment width, the memory being configured to receive a first write output with a width corresponding to the bus segment width, the first write output comprising first data to be written to a first memory cell of the memory, the first data being from the data source, and
an interface having a width equal to the bus segment width, the interface being configured to receive data from a plurality of different data sources at the same time.