| CPC G06F 11/3652 (2013.01) [G06F 11/3636 (2013.01); G06F 11/3656 (2013.01); G06F 30/331 (2020.01)] | 20 Claims |
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1. A non-transitory computer readable medium comprising stored instructions, the instructions when executed by a processor cause the processor to:
receive, from an emulator, waveforms of signals of a plurality of logic circuits of a circuit design, the signals traced by the emulator for a plurality of clock cycles during emulation of the plurality of logic circuits;
obtain a computerized model of the plurality of logic circuits;
identify a subset of logic circuits in the plurality of logic circuits having known inputs;
determine a total number of logic circuits in the subset;
determine, for each logic circuit in the subset, a number of outputs of the logic circuit; and
responsive to determining that the total number of logic circuits in the subset is below a threshold number,
select, from the subset, a first logic circuit having a highest number of outputs;
simulate electronically the first logic circuit by a first processing unit among a plurality of processing units using a first portion of the computerized model corresponding to the first logic circuit; and
generate a first set of waveforms from outputs of the first logic circuit based on the simulation of the first logic circuit.
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