CPC G06F 3/0653 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0673 (2013.01)] | 20 Claims |
1. A memory sub-system comprising:
a memory component comprising a log data store; and
a processing device coupled to the memory component, the processing device comprising:
a first hardware counter designated for counting transaction layer packets (TLPs); and
a second hardware counter designated for counting data link layer packets (DLLPs);
the processing device to perform operations comprising:
generating log data comprising frequency and latency information associated with data packets communicated between the memory sub-system and a host system via a communication channel of a physical host interface, the generating of log data comprising:
determining a frequency of TLPs based on a number of TLPs communicated over the communication channel over a time interval determined by the first hardware counter; and
determining a frequency of DLLPs based on a number of DLLPs communicated over the communication channel over the time interval determined by the second hardware counter; and
storing the log data in the log data store.
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