US 11,726,677 B2
Storage device configured to change power state based on reference clock from host device and method for operating the same
Kwanwoo Noh, Seoul (KR); Sungho Seo, Seoul (KR); and Yongwoo Jeong, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jan. 6, 2021, as Appl. No. 17/142,627.
Claims priority of application No. 10-2020-0003793 (KR), filed on Jan. 10, 2020.
Prior Publication US 2021/0216223 A1, Jul. 15, 2021
Int. Cl. G06F 3/06 (2006.01); G06F 9/44 (2018.01); G06F 9/4401 (2018.01); G06F 1/04 (2006.01)
CPC G06F 3/0625 (2013.01) [G06F 1/04 (2013.01); G06F 3/0653 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 9/4418 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A storage device comprising:
an interface circuit configured to exchange data with a host device, the interface circuit including,
a first input terminal configured to receive a first signal from the host device,
a second input terminal configured to receive a second signal from the host device, the second signal being complementary to the first signal,
a squelch circuit configured to detect levels of the first signal and the second signal,
a reference clock detector configured to detect a receipt of a reference clock from the host device, and to detect whether host device has suspended transmission of the reference clock to the storage device while the storage device is in an active mode,
a phase-locked loop configured to generate a plurality of clocks based on the reference clock; and
a power manager configured to supply a power to the interface circuit such that the power manager selectively supplies the power to the squelch circuit by blocking supply of the power to the squelch circuit of the storage device, without transferring a signal from the storage device to the host device, in response to the reference clock detector detecting that the host device has suspended transmission of the reference clock to the storage device while the storage device is in the active mode, wherein
the squelch circuit and the reference clock detector are implemented in a physical layer (M-PHY) of the interface circuit,
the reference clock detector is implemented outside the squelch circuit, and
the reference clock detector is configured to detect toggling of the reference clock from the host device while the squelch circuit is powered-off.