US 11,726,378 B2
Liquid crystal display device
Shunpei Yamazaki, Setagaya (JP); Yukie Suzuki, Atsugi (JP); Hideaki Kuwabara, Isehara (JP); and Hajime Kimura, Atsugi (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Nov. 30, 2021, as Appl. No. 17/537,958.
Application 16/411,594 is a division of application No. 15/698,904, filed on Sep. 8, 2017, granted, now 10,338,447, issued on Jul. 2, 2019.
Application 17/537,958 is a continuation of application No. 16/912,853, filed on Jun. 26, 2020, granted, now 11,194,207.
Application 16/912,853 is a continuation of application No. 16/726,444, filed on Dec. 24, 2019, granted, now 10,712,625, issued on Jul. 14, 2020.
Application 16/726,444 is a continuation of application No. 16/411,594, filed on May 14, 2019, granted, now 10,678,107, issued on Jun. 9, 2020.
Application 15/698,904 is a continuation of application No. 14/859,741, filed on Sep. 21, 2015, granted, now 9,766,526, issued on Sep. 19, 2017.
Application 14/859,741 is a continuation of application No. 14/489,990, filed on Sep. 18, 2014, granted, now 9,188,825, issued on Nov. 17, 2015.
Application 14/489,990 is a continuation of application No. 13/909,398, filed on Jun. 4, 2013, granted, now 8,842,230, issued on Sep. 23, 2014.
Application 13/909,398 is a continuation of application No. 13/681,880, filed on Nov. 20, 2012, granted, now 8,462,286, issued on Jun. 11, 2013.
Application 13/681,880 is a continuation of application No. 13/332,786, filed on Dec. 21, 2011, granted, now 8,325,285, issued on Dec. 4, 2012.
Application 13/332,786 is a continuation of application No. 12/795,040, filed on Jun. 7, 2010, granted, now 8,111,362, issued on Feb. 7, 2012.
Application 12/795,040 is a continuation of application No. 12/213,729, filed on Jun. 24, 2008, granted, now 7,738,050, issued on Jun. 15, 2010.
Claims priority of application No. 2007-179092 (JP), filed on Jul. 6, 2007.
Prior Publication US 2022/0091453 A1, Mar. 24, 2022
Int. Cl. G02F 1/1368 (2006.01); G02F 1/1339 (2006.01); H01L 29/66 (2006.01); H01L 27/12 (2006.01); H01L 29/04 (2006.01); H01L 29/786 (2006.01); G02F 1/1362 (2006.01); G02F 1/1333 (2006.01); G02F 1/1343 (2006.01); H01L 29/45 (2006.01); H01L 29/49 (2006.01)
CPC G02F 1/1368 (2013.01) [G02F 1/1339 (2013.01); G02F 1/133345 (2013.01); G02F 1/134309 (2013.01); G02F 1/136286 (2013.01); H01L 27/1214 (2013.01); H01L 27/1222 (2013.01); H01L 27/1288 (2013.01); H01L 29/04 (2013.01); H01L 29/66765 (2013.01); H01L 29/78678 (2013.01); H01L 29/78696 (2013.01); H01L 29/458 (2013.01); H01L 29/4908 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A liquid crystal display device comprising:
a pixel comprising a first pixel electrode of a first liquid crystal element and a second pixel electrode of a second liquid crystal element; and
a shift register electrically connected to the pixel, the shift register comprising a first transistor, a second transistor, a third transistor, and a fourth transistor,
wherein each of the first pixel electrode and the second pixel electrode is a sub-pixel,
wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor,
wherein one of a source electrode and a drain electrode of the third transistor is electrically connected to one of a source electrode and a drain electrode of the fourth transistor,
wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to a first wiring,
wherein the other of the source electrode and the drain electrode of the second transistor is electrically connected to a second wiring,
wherein a gate electrode of the first transistor is electrically connected to a gate electrode of the fourth transistor,
wherein a gate electrode of the second transistor is electrically connected to the one of the source electrode and the drain electrode of the third transistor and the one of the source electrode and the drain electrode of the fourth transistor,
wherein a gate electrode of the third transistor is electrically connected to the other of the source electrode and the drain electrode of the third transistor,
wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor includes:
a gate insulating film over the gate electrode;
a first semiconductor film over the gate insulating film;
a second semiconductor film over the first semiconductor film;
a third semiconductor film over the second semiconductor film; and
the source electrode and the drain electrode over the third semiconductor film, and
wherein an end portion of one of the source electrode and the drain electrode included in one of the first transistor, the second transistor, the third transistor, and the fourth transistor has a region positioned inside an end portion of the third semiconductor film included in the one of the first transistor, the second transistor, the third transistor, and the fourth transistor.