US 11,726,320 B2
Information processing apparatus, information processing method, and program
Atsushi Ishihara, Kanagawa (JP)
Assigned to SONY CORPORATION, Tokyo (JP)
Appl. No. 17/260,088
Filed by SONY CORPORATION, Tokyo (JP)
PCT Filed Jul. 30, 2019, PCT No. PCT/JP2019/029783
§ 371(c)(1), (2) Date Jan. 13, 2021,
PCT Pub. No. WO2020/044916, PCT Pub. Date Mar. 5, 2020.
Claims priority of application No. 2018-160161 (JP), filed on Aug. 29, 2018.
Prior Publication US 2021/0271075 A1, Sep. 2, 2021
Int. Cl. G02B 27/00 (2006.01); G02B 27/01 (2006.01); G06T 7/20 (2017.01)
CPC G02B 27/0093 (2013.01) [G02B 27/017 (2013.01); G06T 7/20 (2013.01); G02B 2027/0118 (2013.01); G02B 2027/0147 (2013.01)] 16 Claims
OG exemplary drawing
 
1. An information processing apparatus comprising:
an acquisition unit configured to acquire motion information regarding a user;
a determination unit configured to determine image quality of a virtual object based on the motion information acquired by the acquisition unit; and
a display control unit configured to control display of the virtual object based on the image quality determined by the determination unit,
wherein the motion information used to determine the image quality of the virtual object includes a speed of the virtual object relative to the user,
wherein based on the motion information including the speed of the virtual object relative to the user, the determination unit determines the image quality of the virtual object by determining a resolution of the virtual object,
wherein the determination unit determines to decrease the resolution of the virtual object from a first resolution to a second resolution based on a first threshold for the motion information,
wherein the determination unit determines to increase the resolution of the virtual object from the second resolution to the first resolution based on a second threshold for the motion information,
wherein the second threshold for the motion information is smaller than the first threshold for the motion information, and
wherein the acquisition unit, the determination unit, and the display control unit are each implemented via at least one processor.