CPC H10B 61/22 (2023.02) [H01L 21/76898 (2013.01); H01L 21/823475 (2013.01); H01L 23/528 (2013.01)] | 20 Claims |
1. A device comprising:
a substrate having a first side and a second side; and
a memory device, comprising:
a transistor disposed over the first side of the substrate, wherein the transistor comprises a gate and a source feature and a drain feature interposing the gate;
first conductive lines disposed over the transistor;
a memory stack disposed over the first conductive lines; and
second conductive lines disposed over the second side of the substrate, wherein at least one of the second conductive lines is a source line or a word line of the memory device.
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