CPC H10B 61/10 (2023.02) [G11C 11/161 (2013.01); H10N 50/01 (2023.02); H10N 50/10 (2023.02); H10N 50/80 (2023.02)] | 17 Claims |
1. A method for manufacturing a magnetic memory structure, the method comprising:
depositing a plurality of memory element layers over a substrate, the plurality of memory element layers comprising a first magnetic layer formed over the substrate, a non-magnetic, electrically insulating barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the barrier layer;
depositing a Ru hard mask layer over the plurality of memory element layers;
forming a mask structure over the Ru hard mask layer;
performing a first ion beam etching process using the mask structure to etch exposed portions of the Ru hard mask layer and to continue to etch partially through exposed portions of the plurality of memory element layers until the barrier layer is removed, forming a partial memory element pillar;
forming an insulation layer on the formed partial memory element pillar and the remaining memory element layers; and
performing a second ion beam etching process to remove remaining exposed portions of the plurality of memory element layers not formed under the partial memory element pillar, to form a complete memory element pillar.
|