US 11,723,200 B2
Semiconductor device
Kang Min Kim, Hwaseong-si (KR); Jin Hyuk Kim, Hwaseong-si (KR); Jung Tae Sung, Seoul (KR); Joong Shik Shin, Yongin-si (KR); and Sung Hyung Lee, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Aug. 11, 2021, as Appl. No. 17/399,239.
Application 17/399,239 is a continuation of application No. 16/912,894, filed on Jun. 26, 2020, granted, now 11,121,148.
Claims priority of application No. 10-2019-0176457 (KR), filed on Dec. 27, 2019.
Prior Publication US 2021/0375906 A1, Dec. 2, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 43/20 (2023.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); G11C 7/18 (2006.01)
CPC H10B 43/20 (2023.02) [G11C 7/18 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first substrate including a cell region and an extension region surrounding the cell region;
a common source plate disposed on the first substrate;
a supporter disposed on the common source plate;
a stack structure disposed on the supporter and including insulating films and gate electrodes alternately stacked;
a channel hole penetrating the stack structure, the supporter, and the common source plate on the cell region of the first substrate;
an electrode isolation trench spaced apart from the channel hole in a first direction on the cell region of the first substrate, extending lengthwise in a second direction perpendicular to the first direction, and penetrating the stack structure, the supporter, and the common source plate; and
a transistor overlapping the stack structure in a third direction perpendicular to the first and second directions,
wherein a first thickness of the supporter in a first region adjacent to the electrode isolation trench in the first direction is greater than a second thickness of the supporter in a second region formed between the electrode isolation trench and the channel hole.