CPC H10B 12/0335 (2023.02) [H01L 28/60 (2013.01); H10B 12/30 (2023.02)] | 20 Claims |
1. A method for manufacturing a capacitor structure, comprising:
providing a substrate;
forming a stacked structure on the substrate, the stacked structure comprising at least two support material layers arranged at an interval and a sacrificial material layer located between adjacent support material layers;
forming capacitance holes in the stacked structure, each of the capacitance holes comprising at least three through holes arranged in isolation;
forming a lower electrode, the lower electrode at least covering a side wall and a bottom of each of the through holes;
removing the sacrificial material layer, and forming a capacitance dielectric layer on a surface of the lower electrode; and
forming an upper electrode on a surface of the capacitance dielectric layer.
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