US 11,723,110 B2
Discontinuous operation on sidelink
Shuanshuan Wu, San Diego, CA (US); Anantharaman Balasubramanian, San Diego, CA (US); Gabi Sarkis, San Diego, CA (US); Kapil Gulati, Belle Mead, NJ (US); Sudhir Kumar Baghel, Hillsborough, NJ (US); Shailesh Patil, San Diego, CA (US); and Tien Viet Nguyen, Bridgewater, NJ (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM INCORPORATED, San Diego, CA (US)
Filed on Jan. 13, 2021, as Appl. No. 17/148,198.
Claims priority of provisional application 62/968,967, filed on Jan. 31, 2020.
Prior Publication US 2021/0243836 A1, Aug. 5, 2021
Int. Cl. H04W 52/02 (2009.01); H04W 76/28 (2018.01); H04W 80/02 (2009.01); H04W 72/20 (2023.01); H04W 92/18 (2009.01); H04W 88/04 (2009.01)
CPC H04W 76/28 (2018.02) [H04W 52/0216 (2013.01); H04W 72/20 (2023.01); H04W 80/02 (2013.01); H04W 88/04 (2013.01); H04W 92/18 (2013.01)] 30 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a processor configured to:
access, at a first user equipment (UE), a base configuration for determining a discontinuous operation configuration for the first UE; and
determine, by applying at least one parameter to the base configuration, the discontinuous operation configuration that indicates an on-duration period for a sidelink communication and a cycle of discontinuous operation.