US 11,722,816 B2
Signal processing circuit
Wei-Cheng Tang, Hsinchu (TW); and Chia-Ling Chang, Hsinchu (TW)
Assigned to REALTEK SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed by Realtek Semiconductor Corporation, Hsinchu (TW)
Filed on Nov. 15, 2021, as Appl. No. 17/526,084.
Claims priority of application No. 110111937 (TW), filed on Mar. 31, 2021.
Prior Publication US 2022/0321085 A1, Oct. 6, 2022
Int. Cl. H04R 3/00 (2006.01); H03H 7/01 (2006.01); H03K 19/20 (2006.01); H03K 3/037 (2006.01)
CPC H04R 3/00 (2013.01) [H03H 7/0153 (2013.01); H03K 3/037 (2013.01); H03K 19/20 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A signal processing circuit, comprising:
an input buffer circuit coupled to a pin, wherein the pin is configured to receive an input signal; and
a direct-current (DC) voltage detector circuit coupled to the pin and the input buffer circuit, wherein the DC voltage detector circuit is configured to detect the input signal to generate a mode signal and generate a bias of the input buffer circuit according to the mode signal.