CPC H04N 25/75 (2023.01) [H04N 25/772 (2023.01)] | 14 Claims |
1. A ramp buffer circuit, comprising:
an input device having an input coupled to receive a ramp signal;
a bias current source coupled to an output of the input device, wherein the input device and the bias current source are coupled between a power line and ground; and
an assist current source coupled between the output of the input device and ground, wherein the assist current source is configured to conduct an assist current from the output of the input device to ground only during a ramp event generated in the ramp signal.
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