CPC H04N 23/81 (2023.01) [G06T 5/001 (2013.01); G06T 5/50 (2013.01); G06T 2207/20081 (2013.01)] | 18 Claims |
1. An image processing apparatus comprising:
a reduction unit that reduces predetermined disturbance in a frame image shot by an image sensor;
an estimation unit that estimates from at least one first frame image from which the disturbance is reduced, a second frame image of a point of time different from a point of time when the first frame image is shot using a learning model; and
an addition unit that adds the disturbance to the second frame image,
wherein each unit is implemented by one or more computer processors, circuitry or a combination thereof.
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