CPC H04N 19/152 (2014.11) [H04N 19/119 (2014.11); H04N 19/174 (2014.11); H04N 19/436 (2014.11)] | 19 Claims |
1. An apparatus comprising:
a memory storing instructions for encoding using tiling; and
a processor that executes the instructions to:
encode a video stream including a plurality of frames, to encode the video stream the processor executes the instructions to:
identify a current frame from the plurality of frames, wherein the current frame includes a plurality of blocks, and wherein the current frame has a frame-width indicating a cardinality of horizontally adjacent blocks in the current frame, and a frame-height indicating a cardinality of vertically adjacent blocks in the current frame;
encode the current frame, wherein, to encode the current frame, the processor executes the instructions to:
identify a tile-width for encoding a current tile of the current frame, the tile-width indicating a cardinality of horizontally adjacent blocks in the current tile;
identify a tile-height for encoding the current tile of the current frame, the tile-height indicating a cardinality of vertically adjacent block in the current tile; and
generate an encoded tile, wherein, to generate the encoded tile, the processor executes the instructions to encode the current tile, such that a row of the current tile includes tile-width horizontally adjacent blocks from the plurality of blocks, and a column of the current tile includes tile-height vertically adjacent blocks from the plurality of blocks; and
output the encoded tile, wherein, to output the encoded tile, the processor executes the instructions to include an encoded-tile size in an output bitstream, the encoded-tile size indicating a cardinality of bytes for including the encoded tile in the output bitstream, wherein, in response to a determination that the encoded tile is a last encoded tile in the current frame, the processor executes the instructions to omit including the encoded-tile size in the output bitstream.
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