US 11,721,783 B2
Solar cell and method for manufacturing the same
Jie Yang, Shanghai (CN); Zhao Wang, Shanghai (CN); Peiting Zheng, Shanghai (CN); Xinyu Zhang, Shanghai (CN); and Hao Jin, Shanghai (CN)
Assigned to Shangrao Jinko solar Technology Development Co., LTD, Jiangxi Province (CN)
Filed by JINKO GREEN ENERGY (SHANGHAI) MANAGEMENT CO., LTD, Shanghai (CN); and ZHEJIANG JINKO SOLAR CO., LTD, Yuan Hua (CN)
Filed on Jan. 19, 2022, as Appl. No. 17/578,868.
Application 17/578,868 is a continuation of application No. 17/005,869, filed on Aug. 28, 2020, granted, now 11,264,529.
Claims priority of application No. 202010857263.X (CN), filed on Aug. 24, 2020.
Prior Publication US 2022/0140178 A1, May 5, 2022
Int. Cl. H01L 31/20 (2006.01); H01L 31/0216 (2014.01); H01L 31/0224 (2006.01); H01L 31/18 (2006.01); H01L 31/0747 (2012.01)
CPC H01L 31/202 (2013.01) [H01L 31/02167 (2013.01); H01L 31/022425 (2013.01); H01L 31/0747 (2013.01); H01L 31/1864 (2013.01); H01L 31/208 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A solar cell, comprising:
a semiconductor substrate having a front side and a back side opposite to each other;
a doped layer located on the front side of the semiconductor substrate, wherein the doped layer has a lightly doped region having a first doping concentration and a heavily doped region having a second doping concentration greater than the first doping concentration, and the heavily doped region protrudes from a surface of the semiconductor substrate and includes doped polycrystalline silicon;
a front passivated layer and/or a anti-reflection layer located on a surface of the doped layer facing away from the semiconductor substrate; and
a front electrode located on a surface of the front passivated layer and/or the anti-reflection layer facing away from the doped layer, wherein the front electrode penetrates through the front passivated layer and/or the anti-reflection layer to form an ohmic contact with the heavily doped region of the doped layer,
wherein the solar cell further comprises:
a tunnel oxidized layer located on the back side of the semiconductor substrate;
a doped amorphous silicon layer located on a surface of the tunnel oxidized layer facing away from the semiconductor substrate;
a back passivated layer located on a surface of the doped amorphous silicon layer facing away from the tunnel oxidized layer; and
a back electrode located on a surface of the back passivated layer facing away from the doped amorphous silicon layer, wherein the back electrode penetrates through the back passivated layer to form an ohmic contact with the doped amorphous silicon layer.