US 11,721,770 B2
Manufacturing method of semiconductor device
Chin-Hung Chen, Tainan (TW); Ssu-I Fu, Kaohsiung (TW); Chih-Kai Hsu, Tainan (TW); Chun-Ya Chiu, Tainan (TW); Chia-Jung Hsu, Tainan (TW); and Yu-Hsiang Lin, New Taipei (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Sep. 15, 2021, as Appl. No. 17/476,461.
Application 17/476,461 is a division of application No. 16/572,556, filed on Sep. 16, 2019, granted, now 11,152,515.
Claims priority of application No. 108129242 (TW), filed on Aug. 16, 2019.
Prior Publication US 2022/0005957 A1, Jan. 6, 2022
Int. Cl. H01L 29/786 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/306 (2006.01); H01L 21/02 (2006.01)
CPC H01L 29/78696 (2013.01) [H01L 21/02603 (2013.01); H01L 21/30612 (2013.01); H01L 21/30625 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66522 (2013.01); H01L 29/66742 (2013.01); H01L 29/78681 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A manufacturing method of a semiconductor device, comprising:
forming a dielectric layer on a semiconductor substrate;
forming an opening penetrating the dielectric layer and exposing a part of the semiconductor substrate;
forming a stacked structure on the dielectric layer, wherein the stacked structure comprises:
a first semiconductor layer partly formed in the opening and partly formed on the dielectric layer;
a sacrificial layer formed on the first semiconductor layer; and
a second semiconductor layer formed on the sacrificial layer;
performing a patterning process for forming at least one fin-shaped structure on the semiconductor substrate, wherein the stacked structure is patterned by the patterning process, and the at least one fin-shaped structure comprises a part of the first semiconductor layer, a part of the sacrificial layer, and a part of the second semiconductor layer; and
performing an etching process to remove the sacrificial layer in the at least one fin-shaped structure, wherein the first semiconductor layer in the at least one fin-shaped structure is etched to become a first semiconductor wire by the etching process, and the second semiconductor layer in the at least one fin-shaped structure is etched to become a second semiconductor wire by the etching process.