US 11,721,719 B2
Heterojunction bipolar transistor with buried trap rich isolation region
Vibhor Jain, Williston, VT (US); Anthony K. Stamper, Burlington, VT (US); John J. Ellis-Monaghan, Grand Isle, VT (US); Steven M. Shank, Jericho, VT (US); and Rajendran Krishnasamy, Essex Junction, VT (US)
Assigned to GLOBALFOUNDRIES U.S. INC., Malta, NY (US)
Filed by GLOBALFOUNDRIES U.S. Inc., Santa Clara, CA (US)
Filed on Oct. 20, 2020, as Appl. No. 17/74,891.
Prior Publication US 2022/0123107 A1, Apr. 21, 2022
Int. Cl. H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/66 (2006.01); H01L 29/737 (2006.01); H01L 21/763 (2006.01); H01L 29/165 (2006.01)
CPC H01L 29/0642 (2013.01) [H01L 21/763 (2013.01); H01L 29/0826 (2013.01); H01L 29/165 (2013.01); H01L 29/66242 (2013.01); H01L 29/7371 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A structure comprising:
a trap rich isolation region embedded within a bulk substrate;
a heterojunction bipolar transistor above the trap rich isolation region, with its sub-collector region separated from the trap rich isolation region by a layer of the bulk substrate; and
an additional trap rich isolation region under shallow trench isolation structures, the additional trap rich isolation region being vertical above the trap rich isolation region and separated from the trap rich isolation region by the bulk substrate.