US 11,721,623 B2
Backside connection structures for nanostructures and methods of forming the same
Li-Zhen Yu, New Taipei (TW); Chia-Hao Chang, Hsinchu (TW); Lin-Yu Huang, Hsinchu (TW); Cheng-Chi Chuang, New Taipei (TW); and Chih-Hao Wang, Baoshan Township (TW)
Assigned to Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on Feb. 21, 2022, as Appl. No. 17/676,300.
Application 17/676,300 is a continuation of application No. 16/910,453, filed on Jun. 24, 2020, granted, now 11,257,758.
Prior Publication US 2022/0181250 A1, Jun. 9, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/00 (2006.01); H01L 23/528 (2006.01); H01L 29/423 (2006.01); H01L 21/768 (2006.01); H01L 23/535 (2006.01); H01L 29/45 (2006.01); H01L 29/786 (2006.01)
CPC H01L 23/528 (2013.01) [H01L 21/76895 (2013.01); H01L 23/535 (2013.01); H01L 29/42392 (2013.01); H01L 29/456 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a backside insulating matrix layer:
a nanostructure overlying the backside insulating matrix layer and including at least one semiconductor channel plate, a gate structure, a first active region, and a second active region;
an epitaxial semiconductor material portion laterally spaced from the semiconductor nanostructure and overlying the backside insulating matrix layer;
a backside metal interconnect structure located on a bottom surface of the backside insulating matrix layer; and
an electrically conductive path connecting the first active region and the backside metal interconnect structure.