US 11,721,603 B2
Integrated fan out method utilizing a filler-free insulating material
Wei-Chih Chen, Taipei (TW); Sih-Hao Liao, New Taipei (TW); Yu-Hsiang Hu, Hsinchu (TW); and Hung-Jui Kuo, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Apr. 1, 2021, as Appl. No. 17/220,722.
Claims priority of provisional application 63/091,966, filed on Oct. 15, 2020.
Prior Publication US 2022/0122898 A1, Apr. 21, 2022
Int. Cl. H01L 23/31 (2006.01); H01L 23/498 (2006.01)
CPC H01L 23/3178 (2013.01) [H01L 23/3192 (2013.01); H01L 23/49822 (2013.01); H01L 23/49861 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
depositing a first metallization pattern on a substrate;
depositing a first insulating layer over the first metallization pattern, the first insulating layer being filler-free;
curing the first insulating layer, causing the first insulating layer to shrink less than 5%;
forming a first opening through the first insulating layer to expose a portion of the first metallization pattern;
without leveling the first insulating layer, depositing a second metallization pattern over the first insulating layer and in the first opening;
depositing a second insulating layer over the second metallization pattern, the second insulating layer being filler-free; and
curing the second insulating layer, causing the second insulating layer to shrink between 20% and 35%.