US 11,721,602 B2
Semiconductor package with stiffener structure
Wensen Hung, Hsinchu County (TW); Yu-Ling Tsai, Hsinchu (TW); Chien-Chia Chiu, Taoyuan (TW); and Tsung-Yu Chen, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 6, 2021, as Appl. No. 17/314,002.
Prior Publication US 2022/0359322 A1, Nov. 10, 2022
Int. Cl. H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/12 (2006.01)
CPC H01L 23/31 (2013.01) [H01L 21/56 (2013.01); H01L 23/12 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a chip package, disposed on a substrate;
a plurality of electronic components, disposed aside the chip package on the substrate;
a stiffener structure, disposed on the substrate, the stiffener structure comprising:
a stiffener ring surrounding the chip package and the plurality of electronic components;
a stiffener rib between the chip package and the plurality of electronic components, wherein the stiffener rib comprises a first portion and a second portion on the first portion, and a width of the second portion is greater than a width of the first portion; and
a lid, attached to the stiffener structure, the chip package and the plurality of electronic components,
wherein the lid comprises a first recess portion over the stiffener rib, and a plurality of sidewalls of the lid exposed by the first recess portion surround the second portion of the stiffener rib.