US 11,721,601 B2
Semiconductor package and method of manufacturing the same
Hyeongmun Kang, Hwaseong-si (KR); Jungmin Ko, Hwaseong-si (KR); Seungduk Baek, Hwaseong-si (KR); Taehyeong Kim, Suwon-si (KR); and Insup Shin, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Nov. 11, 2020, as Appl. No. 17/95,210.
Claims priority of application No. 10-2020-0001579 (KR), filed on Jan. 6, 2020.
Prior Publication US 2021/0210397 A1, Jul. 8, 2021
Int. Cl. H01L 23/24 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01)
CPC H01L 23/24 (2013.01) [H01L 21/565 (2013.01); H01L 23/3107 (2013.01); H01L 23/5385 (2013.01); H01L 24/13 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/3511 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a substrate;
a plurality of semiconductor devices stacked on the substrate;
a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the substrate and the plurality of semiconductor devices; and
a single molding resin surrounding the plurality of semiconductor devices and the plurality of underfill fillets,
wherein at least one of the underfill fillets is exposed from side surfaces of the single molding resin,
wherein each of the underfill fillets protrude from side surfaces of the plurality of semiconductor devices.