US 11,721,546 B2
Method for making semiconductor device with selective etching of superlattice to accumulate non-semiconductor atoms
Marek Hytha, Brookline, MA (US); Keith Doran Weeks, Chandler, AZ (US); and Nyles Wynn Cody, Tempe, AZ (US)
Assigned to ATOMERA INCORPORATED, Los Gatos, CA (US)
Filed by Atomera Incorporated, Los Gatos, CA (US)
Filed on Oct. 28, 2021, as Appl. No. 17/452,604.
Prior Publication US 2023/0136797 A1, May 4, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 21/3065 (2006.01); H01L 29/66 (2006.01)
CPC H01L 21/02499 (2013.01) [H01L 21/0245 (2013.01); H01L 21/02502 (2013.01); H01L 21/02507 (2013.01); H01L 21/02532 (2013.01); H01L 21/3065 (2013.01); H01L 21/30604 (2013.01); H01L 29/66568 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for making a semiconductor device comprising:
forming a superlattice above a semiconductor layer, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
selectively etching the superlattice to remove semiconductor atoms and cause non-semiconductor atoms to accumulate adjacent the semiconductor layer;
epitaxially growing an active semiconductor device layer above the semiconductor layer and accumulated non-semiconductor atoms after the selective etching; and
forming at least one circuit in the epitaxially grown active semiconductor device layer.