US 11,721,406 B2
Generating test data for a memory system design based on operation of a test system, and related methods, devices, and systems
Won Ho Choi, Santa Clara, CA (US); and Randall J. Rooney, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 6, 2021, as Appl. No. 17/395,988.
Prior Publication US 2023/0037415 A1, Feb. 9, 2023
Int. Cl. G11C 29/14 (2006.01); G11C 11/406 (2006.01); G11C 29/46 (2006.01); G11C 29/12 (2006.01)
CPC G11C 29/14 (2013.01) [G11C 11/40615 (2013.01); G11C 11/40626 (2013.01); G11C 29/12005 (2013.01); G11C 29/46 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
selecting a refresh rate for a number of memory devices of a test system based on an estimated power scenario for a memory system design;
performing a number of refresh operations on the number of memory devices based on the selected refresh rate; and
monitoring at least one operating condition of the test system in response to performance of the number of refresh operations.