US 11,721,391 B2
Multi channel semiconductor device having multi dies and operation method thereof
Yoon-Joo Eom, Hwaseong-si (KR); Joon-Young Park, Seoul (KR); Yongcheol Bae, Yongin-si (KR); Won Young Lee, Seongnam-si (KR); Seongjin Jang, Seongnam-si (KR); Junghwan Choi, Hwaseong-si (KR); and Joosun Choi, Yongin-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jul. 28, 2022, as Appl. No. 17/875,865.
Application 17/875,865 is a continuation of application No. 16/289,747, filed on Mar. 1, 2019, granted, now 11,443,794.
Application 16/289,747 is a continuation of application No. 16/032,837, filed on Jul. 11, 2018, granted, now 10,255,969, issued on Apr. 9, 2019.
Application 16/032,837 is a continuation of application No. 15/889,783, filed on Feb. 6, 2018, granted, now 10,062,430, issued on Aug. 28, 2018.
Application 15/889,783 is a continuation of application No. 14/795,191, filed on Jul. 9, 2015, granted, now 9,899,075, issued on Feb. 20, 2018.
Claims priority of application No. 10-2014-0086188 (KR), filed on Jul. 9, 2014.
Prior Publication US 2022/0366969 A1, Nov. 17, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/4093 (2006.01); G11C 11/4096 (2006.01); G11C 7/10 (2006.01)
CPC G11C 11/4096 (2013.01) [G11C 7/1084 (2013.01); G11C 11/4093 (2013.01); G11C 2207/105 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An operation method of a memory system including a semiconductor device and a memory controller, the semiconductor device including a first die and a second die in a package, the operation method comprising:
a first step in which the memory controller generates a control signal for controlling the first die and the second die;
a second step in which when the control signal is received by the first die from the memory controller, the first die generates first control information based on the received control signal and transmits the first control information to the second die through an internal interface connecting the first die and the second die; and
a third step in which when the first control information is transmitted to the second die, the second die performs an internal operation,
wherein the control signal is one of a reset signal for resetting operations of the first die and the second die and a ZQ signal for ZQ calibration operations of the first die and the second die.