US 11,721,381 B2
Performing refresh operations of a memory device according to a dynamic refresh frequency
Li-Te Chang, San Jose, CA (US); Murong Lang, San Jose, CA (US); Zhongguang Xu, San Jose, CA (US); and Zhenming Zhou, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Aug. 3, 2021, as Appl. No. 17/393,020.
Prior Publication US 2023/0043091 A1, Feb. 9, 2023
Int. Cl. G11C 11/406 (2006.01); G11C 11/4096 (2006.01); G11C 11/4074 (2006.01)
CPC G11C 11/40611 (2013.01) [G11C 11/4074 (2013.01); G11C 11/4096 (2013.01); G11C 11/40622 (2013.01); G11C 11/40626 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, to perform operations comprising:
determining a current refresh frequency associated with the memory device, the current refresh frequency specifying a rate of performing refresh operations on data stored at the memory device;
computing an updated refresh frequency by updating the current refresh frequency based on a criterion reflecting a result of comparing one or more operating parameters of the memory device to their respective threshold values, wherein the one or more operating parameters comprise at least a voltage demarcation level (VDM) retry rate of the memory device; and
performing a refresh operation on data stored at the memory device according to the updated refresh frequency.