CPC G11C 7/06 (2013.01) [G11C 14/0009 (2013.01)] | 16 Claims |
1. A semiconductor device comprising:
a cell array comprising a plurality of memory cells;
a driver circuit electrically connected to the cell array through a first wiring;
a first amplifier circuit electrically connected to the cell array through a second wiring; and
a second amplifier circuit electrically connected to the first amplifier circuit,
wherein the first amplifier circuit is configured to amplify a potential input from the cell array through the second wiring,
wherein the second amplifier circuit is configured to amplify a potential input from the first amplifier circuit, and
wherein each of the driver circuit, the first amplifier circuit, and the second amplifier circuit comprises a region overlapping with the cell array.
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