CPC G06F 30/3315 (2020.01) [G06F 30/347 (2020.01); G06F 30/398 (2020.01); G06F 2119/12 (2020.01)] | 20 Claims |
1. A computer-implemented method of analyzing timing-related design options of a first component-under-design (CUD), the computer-implemented method comprising:
accessing, using a processor, a plurality of timing constraint requirements placed on the first CUD by one or more second CUDs;
wherein each of the plurality of timing constraint requirements is specifically designed for the first CUD; and
performing, using the processor, a comparative analysis of each of the plurality of timing constraint requirements to identify a single timing constraint requirement that satisfies each of the plurality of timing constraint requirements.
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