US 11,720,520 B2
Universal serial bus time synchronization
John H Kelm, Belmont, CA (US); Alexei E Kosut, Campbell, CA (US); and Yi Chun Chen, San Jose, CA (US)
Assigned to APPLE INC., Cupertino, CA (US)
Filed by APPLE INC., Cupertino, CA (US)
Filed on Nov. 25, 2021, as Appl. No. 17/535,590.
Claims priority of provisional application 63/243,757, filed on Sep. 14, 2021.
Prior Publication US 2023/0082266 A1, Mar. 16, 2023
Int. Cl. G06F 13/42 (2006.01); G06F 1/12 (2006.01)
CPC G06F 13/4295 (2013.01) [G06F 1/12 (2013.01); G06F 2213/0042 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a plurality of components;
a distributed timebase circuit, which is configured to (i) provide a plurality of local timebases in physical proximity to the plurality of components, and (ii) synchronize the local timebases to a global timebase so as to provide a consistent time measurement throughout the apparatus;
an interface, which is configured to be coupled to one or more devices, wherein transmissions on the interface are logically divided into a plurality of frames, and wherein time on the interface is defined based on a frame number identifying a particular frame of the plurality of frames; and
a Time Synchronization Circuit (TSC), configured to capture a first timestamp based on the frame number corresponding to a point in time on the interface and to concurrently capture a second timestamp based on a given local timebase of the plurality of local timebases corresponding to the point in time, wherein the first timestamp and the second timestamp correlate time on the interface to the consistent time measurement.