US 11,720,503 B2
Technologies for secure authentication and programming of accelerator devices
Vincent Scarlata, Beaverton, OR (US); Reshma Lal, Hillsboro, OR (US); Alpa Narendra Trivedi, Hillsboro, OR (US); and Eric Innis, Hillsboro, OR (US)
Assigned to INTEL CORPORATION, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Apr. 20, 2022, as Appl. No. 17/724,743.
Application 17/724,743 is a continuation of application No. 16/232,143, filed on Dec. 26, 2018, granted, now 11,386,017.
Claims priority of provisional application 62/687,403, filed on Jun. 20, 2018.
Prior Publication US 2022/0245070 A1, Aug. 4, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/14 (2006.01); H04L 9/32 (2006.01); G06F 21/76 (2013.01); G06F 21/60 (2013.01); H04L 9/08 (2006.01); G06F 9/455 (2018.01); G06F 21/57 (2013.01); G06F 21/64 (2013.01); H04L 41/28 (2022.01); G06F 21/79 (2013.01); H04L 41/046 (2022.01); H04L 9/06 (2006.01); G06F 9/38 (2018.01); G06F 12/0802 (2016.01)
CPC G06F 12/1408 (2013.01) [G06F 9/3877 (2013.01); G06F 9/45558 (2013.01); G06F 12/0802 (2013.01); G06F 21/57 (2013.01); G06F 21/602 (2013.01); G06F 21/606 (2013.01); G06F 21/64 (2013.01); G06F 21/76 (2013.01); G06F 21/79 (2013.01); H04L 9/0631 (2013.01); H04L 9/0637 (2013.01); H04L 9/083 (2013.01); H04L 9/085 (2013.01); H04L 9/0838 (2013.01); H04L 9/0844 (2013.01); H04L 9/0891 (2013.01); H04L 9/321 (2013.01); H04L 9/3215 (2013.01); H04L 9/3226 (2013.01); H04L 9/3268 (2013.01); H04L 9/3278 (2013.01); H04L 41/046 (2013.01); H04L 41/28 (2013.01); G06F 2009/45591 (2013.01); G06F 2009/45595 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computing device comprising:
an accelerator device to:
provide a unique device identifier to an accelerator services enclave (ASE) of a processor of the computing device;
authenticate with the ASE by:
performing a secure key exchange with the ASE to establish a shared secret tunnel key;
verifying an enclave certificate of the ASE; and
providing an attestation response to the ASE indicative of an accelerator device configuration;
establish, responsive to validation and authentication of the accelerator device by the ASE, a secure channel with the ASE protected by the shared secret tunnel key;
receive bitstream image key and bitstream data key from the ASE via the secure channel;
program the accelerator device via the secure channel using the bitstream image key;
in response to authentication of a tenant enclave of the processor by the ASE, securely receive the bitstream data key from the tenant enclave; and
exchange data with the tenant enclave, the data protected by the bitstream data key.