| CPC G06F 12/0646 (2013.01) [G06F 2212/251 (2013.01); G06F 2212/401 (2013.01)] | 15 Claims |
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1. A ternary content addressable memory comprising:
an interface to receive a ternary key;
an integrated circuit memory device that includes a plurality of memory address locations;
hash logic operative to determine a hash value, based upon the ternary key, that corresponds to a memory address location of the memory device;
an encoder to convert a ternary key to a binary bit representation, wherein the ternary key includes at least five ternary value bits, by performing operations that include:
determining binary mapping bits based upon number and positions of ternary non-X (don't care) value bits of the ternary key; and
determining a different binary data bit to correspond to each different ternary non-X value bit of the ternary key, wherein each determined binary data bit has a logic value that matches a logic value of the ternary value bit to which the determined binary data bit corresponds; and
memory controller logic to cause the memory device to store the binary bit representation at the memory address location that corresponds to the determined hash value.
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