US 11,720,472 B2
Liveness as a factor to evaluate memory vulnerability to soft errors
Richard Gavin Bramley, Santa Clara, CA (US); Philip Payman Shirvani, Santa Clara, CA (US); and Nirmal R. Saxena, Los Altos Hills, CA (US)
Assigned to NVIDIA Corporation, Santa Clara, CA (US)
Filed by NVIDIA Corporation, Santa Clara, CA (US)
Filed on Nov. 9, 2021, as Appl. No. 17/522,417.
Application 16/849,697 is a division of application No. 16/115,189, filed on Aug. 28, 2018, granted, now 10,691,572, issued on Jun. 23, 2020.
Application 17/522,417 is a continuation of application No. 16/849,697, filed on Apr. 15, 2020, granted, now 11,188,442.
Claims priority of provisional application 62/552,282, filed on Aug. 30, 2017.
Prior Publication US 2022/0114075 A1, Apr. 14, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/00 (2006.01); G06F 11/34 (2006.01); G06F 11/10 (2006.01); G06F 11/07 (2006.01)
CPC G06F 11/3471 (2013.01) [G06F 11/073 (2013.01); G06F 11/0757 (2013.01); G06F 11/1068 (2013.01); G06F 11/3419 (2013.01); G06F 11/3457 (2013.01); G06F 11/3476 (2013.01); G06F 2201/81 (2013.01); G06F 2201/88 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
executing a simulation for a memory comprising a plurality of portions over a window of time;
during the simulation, determine each residency period for the corresponding portion, wherein the residency period is determined according to:
a first time that the corresponding portion is written with data, and
a second time of a last read of the data from the corresponding portion; and
after completion of the simulation, computing a first liveness factor for the memory based on the residency periods, the first liveness factor representing a vulnerability of the memory to soft errors.