CPC G06F 9/5027 (2013.01) [G06F 9/30014 (2013.01); G06F 9/3802 (2013.01); G06F 9/3836 (2013.01); G06F 9/48 (2013.01); G06N 3/063 (2013.01)] | 22 Claims |
1. A processor-implemented accelerator method, the method comprising:
reading, from a memory, an instruction to be executed in an accelerator, the instruction embedding a parameter value of at least some portion of layers in a neural network for an inference task;
reading, from the memory, input data based on the instruction;
reading, from the instruction, the parameter value for the inference task; and
performing, on the input data and the parameter value embedded in the instruction, the inference task instructed by the instruction.
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