CPC G06F 9/30 (2013.01) [G06F 7/46 (2013.01); G06F 9/30007 (2013.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01)] | 13 Claims |
1. A device supporting a composite scalar instruction comprising:
a storage circuit configured to store a composite scalar instruction and multiple types of data, wherein the multiple types of data are respectively stored in different addresses in the storage circuit in accordance with the types;
a controller circuit configured to read the composite scalar instruction from the storage circuit and decode the composite scalar instruction into a control signal; and
a computing circuit configured to:
receive the control signal from the controller circuit,
read data from the storage circuit,
determine a data type according to an address of the read data, and
process the read data,
wherein the composite scalar instruction is an instruction that combines a floating-point instruction and a fixed-point instruction,
wherein the composite scalar instruction includes an opcode field, an operand address field, and a destination address field,
wherein a data type is determined according to an address in an address field of the operand upon computation,
wherein an opcode stored in the opcode field is used for distinguishing operations of different types,
wherein the operand address field is used for distinguishing types of operands, and
wherein the target address field is an address where a computation result is stored.
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