US 11,720,253 B2
Access of a memory system based on fragmentation
Jun Huang, Boise, ID (US); Bhagyashree Bokade, Boise, ID (US); Violet Gomm, Boise, ID (US); Deping He, Boise, ID (US); and Lavanya Sriram, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 29, 2021, as Appl. No. 17/646,413.
Claims priority of provisional application 63/132,804, filed on Dec. 31, 2020.
Prior Publication US 2022/0206689 A1, Jun. 30, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0611 (2013.01) [G06F 3/064 (2013.01); G06F 3/0679 (2013.01)] 25 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a memory device; and
a controller coupled with the memory device and configured to cause the apparatus to:
receive, from a host system, a first message indicating a set of data pending at the host system that the apparatus is to store using a first write procedure different than a second write procedure;
determine blocks of the memory device that satisfy a fragmentation threshold based at least in part on receiving the first message;
transmit, to the host system after determining the blocks, a second message that indicates the apparatus is ready to receive the set of data indicated in the first message; and
store the set of data in the determined blocks based at least in part on transmitting the second message.