CPC G06F 1/28 (2013.01) [G06N 20/00 (2019.01)] | 14 Claims |
1. A method of regulating power usage of an integrated circuit (IC) comprising:
measuring, by a voltage regulator, a current load;
determining, by the voltage regulator, that the current load satisfies a threshold level indicating an over current condition;
providing, by the voltage regulator, a signal indicating the over current condition to a synchronizer of the IC;
synchronizing, by the synchronizer, the signal to an internal clock domain of the IC to produce a synchronized signal in phase with the internal clock of the IC;
providing, by the synchronizer, the synchronized signal to a sequencer of the IC, the sequencer controlling a flow of instructions to be processed by the IC; and
reducing, by the sequencer in response to the synchronized signal, the flow of instructions to be processed by one or more processors in the IC to limit a processing rate of the IC according to a throttling mask, the throttling masking limiting a rate of data to be processed by the one or more processors in the IC.
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