US 11,720,090 B2
Fault tolerant backplane slot assignment
Sivaram Balasubramanian, Solon, OH (US); Chandresh Chaudhari, Mayfield Heights, OH (US); and Kendal R. Harris, Mentor, OH (US)
Assigned to Rockwell Automation Technologies, Inc., Mayfield Heights, OH (US)
Filed by Rockwell Automation Technologies, Inc., Mayfield Heights, OH (US)
Filed on Nov. 20, 2020, as Appl. No. 16/953,948.
Prior Publication US 2022/0163954 A1, May 26, 2022
Int. Cl. G05B 23/02 (2006.01); H04L 61/50 (2022.01); G05B 19/4063 (2006.01)
CPC G05B 23/0213 (2013.01) [G05B 19/4063 (2013.01); H04L 61/50 (2022.05); G05B 2219/15119 (2013.01); G05B 2223/02 (2018.08)] 19 Claims
OG exemplary drawing
 
1. A method for assigning addresses to a plurality of modules in a fault tolerant industrial control system, the method comprising the steps of:
assigning a master base address to a first base when at least one backplane switch on the first base detects a signal indicating the first base is a master base;
receiving a base address request at the at least one backplane switch on the first base from at least one backplane switch on at least one additional base;
transmitting a base address and a slot start address from the at least one backplane switch on the first base to the at least one backplane switch on the at least one additional base responsive to receiving the base address request when the master base address has been assigned to the first base;
receiving a first slot address request with at least one master module on the master base from a first module on the at least one additional base;
extracting a physical address and a slot address of the first module from the first slot address request with the at least one master module;
receiving a second slot address request with the at least one master module on the master base from the first module on the at least one additional base;
extracting a physical address and a slot address of the first module from the second slot address request with the at least one master module;
comparing the physical address and the slot address extracted from the first slot address request to the physical address and the slot address extracted from the second slot address request;
when the physical address and the slot address extracted from the first slot address request matches the physical address and the slot address extracted from the second slot address request:
transmitting a first slot address response from the at least one master module to the first module on the at least one additional base, the first slot address response identifying a successful slot address request, and
transmitting a second slot address response from the at least one master module to the first module on the at least one additional base, the second slot address response identifying the successful slot address request; and
when either the physical address or the slot address extracted from the first slot address request fails to match the physical address or the slot address extracted from the second slot address request:
transmitting a first slot address response with an error response from the at least one master module to the first module on the at least one additional base, and
transmitting a second slot address response with the error response from the at least one master module to the first module on the at least one additional base.