US 11,718,094 B2
Wafer structure
Hao-Jan Mou, Hsinchu (TW); Ying-Lun Chang, Hsinchu (TW); Hsien-Chung Tai, Hsinchu (TW); Chi-Feng Huang, Hsinchu (TW); Yung-Lung Han, Hsinchu (TW); and Wei-Ming Lee, Hsinchu (TW)
Assigned to Microjet Technology Co., Ltd., Hsinchu (TW)
Filed by Microjet Technology Co., Ltd., Hsinchu (TW)
Filed on Dec. 9, 2020, as Appl. No. 17/116,340.
Claims priority of application No. 109138193 (TW), filed on Nov. 3, 2020.
Prior Publication US 2022/0134748 A1, May 5, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. B41J 2/14 (2006.01); B41J 2/16 (2006.01)
CPC B41J 2/14024 (2013.01) [B41J 2/14072 (2013.01); B41J 2/14129 (2013.01); B41J 2/1601 (2013.01); B41J 2/1635 (2013.01); B41J 2202/11 (2013.01); B41J 2202/13 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A wafer structure, comprising:
a chip substrate being a silicon substrate and fabricated by a semiconductor process on a wafer of at least 12 inches; and
at least one inkjet chip directly formed on the chip substrate, wherein the wafer is diced into the at least one inkjet chip, to be implemented for inkjet printing,
wherein the at least one inkjet chip comprises:
at least one ink-supply channel configured to provide ink; and
a plurality of ink-drop generators respectively connected to the at least one ink-supply channel,
wherein each of the ink-drop generators comprises a thermal-barrier layer, a resistance heating layer, a conductive layer, a protective layer, a barrier layer, an ink-supply chamber and a nozzle, wherein the thermal-barrier layer is directly disposed on a surface of the chip substrate, the resistance heating layer is directly disposed on a surface of the thermal-barrier layer, the conductive layer and a part of the protective layer are formed on the resistance heating layer, a rest part of the protective layer is formed on the conductive layer, wherein the barrier layer is directly formed on the protective layer, and the ink-supply chamber and the nozzle are integrally formed in the barrier layer,
wherein a step difference is formed between the conductive layer and the resistance heating layer, and the conductive layer is misaligned with the resistance heating layer,
wherein the barrier layer includes two opposite inner sidewalls defining two opposite sides of the ink-supply chamber, each of the two opposite inner sidewalls of the barrier layer continuously extends from a respective one of two opposite sides of a top surface of a continuous portion of the protective layer toward the nozzle, the two opposite inner sidewalls of the barrier layer entirely and directly overlap with the conductive layer in a direction normal to a bottom of the ink-supply chamber, and the top surface of the continuous portion of the protective layer is the bottom of the ink-supply chamber, and
wherein an ink supply path is formed between the at least one ink-supply channel and the ink-supply chamber of each of the plurality of ink-drop generators, and the ink supply path is configured to supply the ink from the at least one ink-supply channel to the ink-supply chamber in a plane parallel with the bottom of the ink supply chamber.