US 11,716,810 B2
Wiring board
Masaya Takizawa, Nagano (JP); Rie Mizutani, Nagano (JP); Hiroshi Taneda, Nagano (JP); Yoshiki Akiyama, Nagano (JP); and Noriyoshi Shimizu, Nagano (JP)
Assigned to SHINKO ELECTRIC INDUSTRIES CO., LTD., Nagano (JP)
Filed by SHINKO ELECTRIC INDUSTRIES CO., LTD., Nagano (JP)
Filed on Apr. 26, 2022, as Appl. No. 17/660,700.
Claims priority of application No. 2021-078612 (JP), filed on May 6, 2021.
Prior Publication US 2022/0361331 A1, Nov. 10, 2022
Int. Cl. H05K 1/02 (2006.01); H05K 1/11 (2006.01)
CPC H05K 1/113 (2013.01) [H05K 1/0271 (2013.01); H05K 2201/0212 (2013.01); H05K 2201/068 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A wiring board comprising:
a first interconnect structure including a first interconnect layer, and a first insulating layer that includes a non-photosensitive thermosetting resin as a main component thereof;
a second interconnect structure including a plurality of second interconnect layers, and a plurality of second insulating layers that includes a photosensitive resin as a main component thereof, the second interconnect structure being laminated on the first interconnect structure; and
an encapsulating resin layer that includes a non-photosensitive thermosetting resin as a main component thereof, the encapsulating resin layer being laminated on an uppermost layer of the plurality of second insulating layers, wherein
an uppermost layer of the plurality of second interconnect layers includes a pad protruding from the uppermost layer of the plurality of second insulating layers,
the encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad, and
a thermal expansion coefficient of the first insulating layer and a thermal expansion coefficient of the encapsulating resin layer are lower than a thermal expansion coefficient of the plurality of second insulating layers.