CPC H04N 19/126 (2014.11) [H04N 19/124 (2014.11); H04N 19/176 (2014.11); H04N 19/18 (2014.11); H04N 19/30 (2014.11); H04N 19/60 (2014.11)] | 3 Claims |
1. An encoder comprising:
circuitry; and
memory coupled to the circuitry, wherein
using the memory, the circuitry, in operation:
writes, into a bitstream, information related to a first quantization matrix;
performs an up-conversion and a down-conversion on the first quantization matrix to generate a second quantization matrix, the first quantization matrix having a first number of rows and a first number of columns equal to the first number of rows to form a square matrix, the second quantization matrix having a second number of rows and a second number of columns different from the second number of rows to form a rectangular matrix;
quantizes transform coefficients of a current block using the second quantization matrix; and
encodes the quantized transform coefficients of the current block, wherein
the up-conversion is performed on the first quantization matrix in a first direction such that one of the second number of rows and the second number of columns is larger than the first number of rows, without up-conversion being performed on the first quantization matrix in a second direction that is different from the first direction, the first direction being a horizontal direction and the second direction being a vertical direction; and
the down-conversion is performed on the first quantization matrix in the second direction such that the other of the second number of rows and the second number of columns is smaller than the first number of rows, without down-conversion being performed on the first quantization matrix in the first direction.
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